Switching and network delay calculations
Goals and assumptions
Compare circuit, datagram-packet and virtual-circuit switching; derive last-bit arrival times rather than guessing from bandwidth. Use decimal units: 1 Mb/s=10^6 bits/s, 1 ms=10^-3 s; a byte has eight bits. Unless stated otherwise, links are full duplex, error-free and store-and-forward, with no processing/queueing delays, ACKs or setup costs. L denotes the entire transmitted packet in bits, including any stated headers.
1. What is switched?
Circuit switching reserves a resource path before data transfer. A reserved channel can provide predictable capacity but idle reserved capacity is unavailable to other users of that reservation. Setup time matters for a short transfer. It is not necessary that the whole physical wire belong to one user: time or frequency slots can form circuits.
Datagram packet switching shares link capacity statistically. Each packet carries addressing information and can be forwarded independently; packets can take different routes and arrive out of order. A virtual circuit first establishes forwarding state along a path; packets use a connection identifier with local significance. A switch can map an incoming label/port to a different outgoing label/port. Virtual circuit does not automatically mean dedicated bandwidth, reliable delivery or zero queueing. Packet switching and connection-oriented forwarding are compatible.
Worked comparison: reserve 1 Mb/s after 20 ms setup and send 100,000 bits over a circuit. Ignoring propagation, completion=20+100=120 ms. A packet path with 2 Mb/s usable rate and 40 ms total specified non-transmission delay takes 50+40=90 ms for the same data under this simplified model. Change the setup or load and the winner can change; no switching method is universally faster.
2. Four delay components
Transmission delay L/R is the time to put all packet bits onto a link. Propagation delay d/v is the travel time of a bit over distance d at signal speed v. Processing inspects headers or detects errors; queueing waits for a busy output. Transmission depends on length and rate, propagation on medium and distance. Increasing R does not make a particular bit travel faster.
Example: L=1500 bytes=12,000 bits, R=6 Mb/s, d=600 km=600,000 m and v=2×10^8 m/s. Transmission=2 ms, propagation=3 ms; last bit arrives 5 ms after the first bit starts transmission, with other delays zero. First bit arrives after 3 ms. A long cable may contain many bits simultaneously; it is not necessary to await one bit's arrival before sending the next.
Bandwidth-delay product R×T has units of bits. For one-way propagation of 3 ms at 6 Mb/s, 18,000 bits can be in flight on that link. For a round-trip window calculation use the relevant round-trip interval, not this one-way value by accident. A pipeline can have high throughput despite a large first-packet latency.
3. Store-and-forward timelines
A router must receive the whole packet before transmitting it under our store-and-forward model. For one packet on H links, completion time is sum over links of L/R_i plus propagation delays, and any explicitly given processing/queueing. H links means H−1 intermediate routers on a simple path; count links, not routers.
Worked unequal-rate path: a 1000-byte packet crosses rates 2 Mb/s and 1 Mb/s with propagation 1 ms per link. It reaches the router fully at 4+1=5 ms. Router then transmits for 8 ms; receiver gets the last bit at 5+8+1=14 ms. It is wrong to divide by the sum of rates. With many packets, the slower link becomes the throughput bottleneck.
For N identical packets over H identical-rate links, with sufficient buffers, simultaneous use of distinct links, no cross traffic and fixed propagation p per link, last-packet completion=(N+H−1)L/R+Hp. First packet pays H transmissions; remaining packets emerge one L/R apart. Example: N=4, H=3, L=1000 bytes, R=2 Mb/s, p=1 ms gives (4+3−1)×4+3=27 ms. Sending the 4000-byte message as one unsegmented packet instead takes 3×16+3=51 ms. This comparison ignores segmentation overhead; real headers can reduce or reverse gains from excessively small packets.
4. Queueing, utilization and goodput
A packet arriving at a FIFO output must wait for service already ahead of it, including the remaining transmission of a partly sent packet. If two complete 1000-byte packets are ahead on a 1 Mb/s output and nothing is in service, its waiting time is 16 ms. Its own 8 ms transmission is not part of its waiting time. Queueing is traffic-dependent; an average arrival rate below capacity alone cannot determine every packet's delay or rule out bursts.
Link rate is a physical capacity, throughput is an achieved delivered rate at a stated boundary, and goodput counts useful application data. For 1000-byte payloads in 1040-byte packets on an otherwise saturated 10 Mb/s link, ideal payload goodput=10×1000/1040≈9.615 Mb/s. This excludes all other overhead/loss; do not claim this is a measured TCP rate.
Common traps
Keep bits and bytes distinct; convert distance to metres; include all links; distinguish first-bit from last-bit arrival; add setup only once when appropriate; and state whether packets overlap on different links. Formula memorization without a timeline often hides a wrong model.
Original practice: six single-correct MCQs
These original teaching questions are not previous-year questions. Choose exactly one answer.
P01. A 2000-byte packet uses an 8 Mb/s link. Transmission delay?
A. 0.25 ms B. 2 ms C. 16 ms D. 8 ms
Answer: B
A: This treats bytes as bits.
B: 16000/(8×10^6)=0.002 s.
C: This corresponds to 1 Mb/s.
D: The given values do not yield 8 ms.
P02. A 1000 km link has signal speed 2×10^8 m/s. Propagation delay?
A. 5 ms B. 0.005 ms C. 500 ms D. Depends on packet length
Answer: A
A: 10^6/(2×10^8)=0.005 s.
B: This misses the kilometres-to-metres conversion.
C: This is 100 times too large.
D: Packet length affects transmission, not propagation.
P03. Five equal packets cross three equal-rate store-and-forward links; transmission per packet per link is 2 ms and all other delays are zero. Last completion?
A. 6 ms B. 10 ms C. 14 ms D. 30 ms
Answer: C
A: This is only the first packet.
B: This omits pipeline fill beyond the first link.
C: (5+3−1)×2=14 ms.
D: This forbids overlap across distinct links.
P04. Which is necessarily true of a virtual circuit?
A. It reserves the entire physical link B. It never queues packets C. It needs no forwarding state D. It uses established connection-specific forwarding state
Answer: D
A: A virtual circuit need not reserve full bandwidth.
B: Shared outputs can queue.
C: Its connection mapping is forwarding state.
D: Setup establishes how connection-labelled packets are forwarded.
P05. Three full 500-byte packets wait ahead of yours at an idle 2 Mb/s FIFO output. Your waiting time before transmission?
A. 2 ms B. 6 ms C. 8 ms D. 0 ms
Answer: B
A: This counts only one preceding packet.
B: 3×4000/(2×10^6)=6 ms.
C: This adds your own packet transmission if it is 500 bytes.
D: The output has queued work even though initially idle.
P06. Which change reduces transmission delay but not propagation delay on a fixed link?
A. Double the signal speed B. Double the distance C. Double the link bit rate for the same packet D. Double the packet length
Answer: C
A: Signal speed changes propagation.
B: Distance increases propagation.
C: L/R halves; d/v is unchanged.
D: Packet length increases transmission delay.
Sources and scope
Aligned to the 2026 course. This lesson covers the stated slice, not the entire Computer Networks syllabus. All numerical examples and questions are original. No claim of 2027 completeness.
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